Gain control circuit, and a radio communication apparatus using the same

ABSTRACT

A gain control circuit comprises a variable gain circuit having a predetermined gain control range and a control voltage supply circuit for supplying an internal control voltage to the variable gain circuit as a gain control signal. In this gain control circuit, the control voltage supply circuit generates the internal control voltage in response to an external control voltage as to compensate a linearity of the variable gain circuit to an extent of the external control voltage where the variable gain circuit loses a linearity. This gain control circuit is applied to an AGC circuit of a transmitting stage in a CDMA type mobile phone.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a gain control circuit and aradio communication apparatus using such gain control circuit, and moreparticularly the present invention relates to the gain control circuitto be used for an output power control in a mobile radio communicationapparatus, and to the radio communication system using such mobile radiocommunication apparatus.

[0003] 2. Description of the Related Art

[0004] In a mobile radio communication system, for example in a mobiletelephone system, it is desirable that an output power of each mobileterminal is controlled to be received with the same signal strength at abase station in order to increase a communication capacity of the basestation.

[0005] In particular a communication system, in which the mobiletelephone system employs a spectrum scattering method referred to as aCDMA (Code Division Multiple Access) system, plural stations areassigned to the same frequency band and a received signal is recoveredby means of a predetermined scattering code. And accordingly an outputpower control of each mobile terminal becomes a necessary requirement.

[0006] There are two types of power control system that perform theoutput power control of the mobile terminal. One of the two types of thesystems is to determine the output power of the mobile terminal inaccordance with a signal strength of a received signal by the mobileterminal, wherein the signal is transmitted from the base station. Thistype depends on hypothesis that there is a strong correlation between asignal propagation from the base station to the mobile terminal and asignal propagation from the mobile terminal to the base station. Thistype of control is named as an open loop control.

[0007] The other one is to determine by information about an actuallyreceived signal strength of radio wave at the base station, wherein suchinformation is transmitted from the base station to the mobile terminal.This type of control is named as a closed loop control.

[0008] A gain control circuit is necessary in order to control theoutput power. As performances of such gain control circuit requires awide gain control range, a wide dynamic range, a good controllablelinearity, an absolute gain accuracy, a good temperature characteristicand a broad frequency band.

[0009] For example, as the gain control range, about a gain of 90 dB isnecessary in a receiving side, and about a gain of 80 dB is necessary ina transmitting side. As for the dynamic range, it is necessary toconsider, particularly in the receiving side, a situation where a radiosignal wave to be received is very weak but a strong interfering radiowave enters. And accordingly, as for the gain control circuit, atolerance to a very large input signal and a low noise characteristicare simultaneously required.

[0010] It is necessary to match characteristic of the receiving sidegain control circuit and the transmitting side gain control circuitabout the controllable linearity, the absolute gain accuracy, thetemperature characteristic in order to raise an accuracy of previouslydescribed the open loop control. About the frequency bandwidth, it isdifferent by a system, but it is the easiest to do such an operation byan IF (Intermediate Frequency) stage. As for the typical frequency ofthat purpose, there are many cases that are around 100 MHz.

[0011]FIG. 6 is a circuit diagram which shows a conventional embodimentof a variable gain circuit constituting a gain control circuit. Thevariable gain circuit of this conventional embodiment has a differentialamplifying circuit 101, a bias circuit 102, a pair of current dividingcircuits 103 and 104 and a pair of resistive circuit meshes 105 and 106.

[0012] The differential amplifying circuit 101 comprises npn typedifferential pair transistors Q101 and Q102, in which each emitterelectrode of the transistors Q101 and Q102 is grounded throughrespective emitter resistor R101, R102. An input voltage Vi is suppliedto input terminals Vin+, Vin− connected to each base electrode of thedifferential pair transistors Q101 and Q102.

[0013] The bias circuit 102 comprises bias resistors R103 and R104connected to each base electrode of the differential pair transistorsQ101 and Q102 and a bias voltage supply 107 connected between the biasresistors R103 and R104 and the ground for supplying a fixed biasvoltage Vbias to each base electrode of the differential pairtransistors Q101 and Q102 through the bias resistors R103 and R104.

[0014] One current dividing circuit 103 comprises npn type differentialpair transistors Q103 and Q104, in which each emitter electrode of thetransistors Q103 and Q104 is connected commonly to a collector electrodeof the transistor Q101. The other current dividing circuit 104 comprisesnpn type differential pair transistors Q105 and Q106, in which eachemitter electrode of the transistors Q105 and Q106 is connected commonlyto a collector electrode of the transistor Q102.

[0015] In these current dividing circuits 103 and 104, each baseelectrode of transistors Q103 and Q105 are connected to each other, eachbase electrode of transistors Q104 and Q106 are connected to each otherand a control voltage Vc is applied to a pair of input terminals Vc+,Vc− connected between these base electrodes of the transistors Q103,Q105, Q104 and Q106. And an output voltage Vo is provided from a pair ofoutput terminals Vout+, Vout− connected to each collector electrode ofthe transistors Q103 and Q105.

[0016] The one resistive circuit mesh 105 comprises resistors R105 andR106 connected between the differential pair transistors Q103, Q104 anda power source voltage VCC and a resistor R107 connected to thecollector electrodes of the differential pair transistor Q103 and Q104.The other resistive circuit mesh 106 comprises resistors R108 and R109connected between the differential pair transistors Q105, Q106 and thepower source voltage VCC and a resistor R110 connected to the collectorelectrodes of the differential pair transistor Q105 and Q106.

[0017] A transmission gain G of the variable gain circuit as shown inFIG. 6 is now explained. At first the control voltage Vc from thecontrol voltage supply circuit 108 is supplied to the input terminalsVc+, Vc− connected between the base electrodes of the differential pairtransistors Q103 and Q104 and the base electrodes of the differentialpair transistors Q105 and Q106. This control voltage supply circuit 108generates an internal control voltage Vc varying in linear relative tothe external control voltage VC supplied from an external controlvoltage generating source 109.

[0018] The transmission gain G varies by changing a ratio of flowingcurrents of the current dividing circuits 103 and 104 in accordance withthe internal control voltage Vc generated at the control voltage supplycircuit 108 based on the external control voltage VC from the externalcontrol voltage generating source 109, wherein a potential differenceΔVbe between base electrodes of the differential pair transistors Q103and Q104 and the differential pair transistors Q105 and Q106 are changedby means of the internal control voltage Vc supplied from the controlvoltage supply circuit 108.

[0019] The transmission gain G is expressed by a next expression.

G=Gmax/{1+exp(−qVc/kt)}+Gmim/{1+exp(qVc/kt)}

[0020] The Gmax shows a maximum transmission gain of the variable gaincircuit, the Gmin shows a minimum transmission gain of the variable gaincircuit, the q shows a charge of an electron, the k shows theBoltzmann's constant and the t shows an absolute temperature.

[0021] As described above, in the conventional variable gain circuit,the transmission gain G is controlled by means of the internal controlvoltage Vc that varies in linear relative to the external controlvoltage VC. As shown in FIG. 7, as a gain control characteristic to theexternal control voltage VC approaches to the maximum transmission gainGmax or the minimum transmission gain Gmin, a characteristic curve tendsto bend, and a linearity of the variable gain circuit becomesdeteriorated.

[0022] This kind of variable gain circuit composes a gain controlcircuit by providing plural number of the variable gain circuits in acascade connection by way of buffer circuits. For example, this kind ofgain control circuit is used as an AGC (Automatic Gain Control)amplifier for amplifying an IF (Intermediate Frequency) signal of atransmission stage in an RF (Radio Frequency) front-end section of theCDMA type mobile telephone apparatus.

[0023] In such application, such multistage type variable gain circuitsuch as mention above is used as the AGC amplifier in order to satisfy arequest for a wide variable gain range, but if a linearity of the gaincontrol characteristic is bad, it is necessary to increase the number ofstages of the variable gain circuit to be cascade-connected thereto. Asa result, a circuit scale of the AGC amplifier becomes large and acurrent consumption increases, too.

SUMMARY OF THE INVENTION

[0024] A primary object of the invention provides a gain control circuithaving a better controllable linear characteristic related to anexternal control voltage and a radio communication apparatus using suchgain control circuit.

[0025] A gain control circuit of the present invention comprises avariable gain circuit having a predetermined gain control range and acontrol voltage supply circuit for supplying an internal control voltageto the variable gain circuit as a gain control signal, wherein thecontrol voltage supply circuit generates the internal control voltage inresponse to an external control voltage as to compensate a linearity ofthe variable gain circuit to an extent of the external control voltagewhere the variable gain circuit loses a linearity. And this gain controlcircuit can be used at an IF signal amplifying stage of a radiocommunication apparatus such as a mobile telephone apparatuses as anamplification means.

[0026] Namely in a radio communication apparatus having an amplificationmeans in a transmitting stage for amplifying an intermediate frequencysignal and supplying the intermediate frequency signal to a mixingcircuit, according to another aspect of the present invention, theamplification means comprises a variable gain circuit having apredetermined gain control range and a control voltage supply circuitfor supplying an internal control voltage to the variable gain circuitas a gain control signal, wherein the control voltage supply circuitgenerates the internal control voltage in response to an externalcontrol voltage as to compensate a linearity of the variable gaincircuit to an extent of the external control voltage where the variablegain circuit loses a linearity.

[0027] Compensation of the non-linearity is done in a range where alinearity of gain control characteristic is lost. As a result, thelinear range of the variable gain circuit can be expanded, so that thelinearity extends to the range where linearity is conventionally lost inthe gain control characteristic of a gain control circuit.

BRIEF DESCRIPTION OF THE DRWAINGS

[0028] In the accompanying drawings:

[0029]FIG. 1 is a circuit diagram showing a construction of a gaincontrol circuit related to a first embodiment of the present invention;

[0030]FIG. 2 is a circuit diagram showing a concrete circuit structureof example of a variable gain circuit;

[0031]FIG. 3A is a graph chart of an internal control voltage as to anexternal control voltage;

[0032]FIG. 3B is a graph chart showing a characteristic of atransmission gain as to the external control voltage;

[0033]FIG. 4 is a block diagram showing a construction of a gain controlcircuit related to a second embodiment of the present invention;

[0034]FIG. 5 is a block diagram showing an example of a construction ofan RF front end part in a CDMA type mobile telephone apparatus;

[0035]FIG. 6 is a circuit diagram showing a construction of a gaincontrol circuit related to a conventional embodiment; and

[0036]FIG. 7 is a graph chart of an external controlvoltage—transmission gain related to the conventional embodiment.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0037] Detailed descriptions of preferred embodiments of the presentinvention are described with reference to the accompanying drawings asfollows. FIG. 1 is a circuit diagram showing a construction of a gaincontrol circuit related to a first embodiment of the present invention.

[0038] A gain control circuit, according to the present invention,comprises a variable gain circuit 11 having a limited variable gainrange and a control voltage supply circuit 13, wherein the controlvoltage supply circuit 13 receives an external control voltage VC froman external control voltage generating source 12 and converts thisexternal control voltage VC into an internal control voltage Vc to besupplied to the variable gain circuit 11 as a gain control voltage.

[0039] As the variable gain circuit 11, a circuit having the samecircuit construction as the variable gain circuit related to theconventional embodiment shown in FIG. 6 is used. In other words, thevariable gain circuit 11 comprises a differential amplifying circuit 21,a bias circuit 22, a pair of current dividing circuits 23 and 24 and apair of resistive circuit meshes 25 and 26 as shown in FIG. 2.

[0040] The differential amplifying circuit 21 comprises npn typedifferential pair transistors Q21 and Q22, wherein emitter electrodes ofthe differential pair transistors Q21 and Q22 are commonly connected tothe ground by way of emitter resistors R21 and R22 and an input voltageVi is supplied to each base electrode of the differential pairtransistors Q21 and Q22 by way of a pair of input terminals Vin+ andVin−.

[0041] The bias circuit 22 comprises bias resistors R23 and R24connected respectively to the base electrodes of the differential pairtransistors Q21 and Q22 and a bias voltage supply 27 connected betweenthe bias resistors R23 and R24 and the ground as to supply a biasvoltage Vbias to each base electrode of the differential pairtransistors Q21 and Q22 through the bias resistors R23 and R24.

[0042] The one current dividing circuit 23 comprises npn typedifferential pair transistors Q23 and Q24, wherein each emitterelectrode of the differential pair transistors Q23 and Q24 is connectedcommonly to a collector electrode of the transistor Q21. The othercurrent dividing circuit 24 comprises npn type differential pairtransistors Q25 and Q26, wherein each emitter electrode of thedifferential pair transistors Q25 and Q26 is connected commonly to acollector electrode of the transistor Q22.

[0043] In these current dividing circuits 23 and 24, base electrodes ofthe transistors Q23 and Q25 are connected to each other and baseelectrodes of the transistors Q24 and Q26 are connected to each other,wherein the internal control voltage Vc is applied to these baseelectrodes of the transistors Q23, Q25, Q24 and Q26 by way of inputterminals Vc+ and Vc−. And an output voltage Vo is derived fromcollectors of the transistors Q23 and Q25 by way of a pair of outputterminals Vout+ and Vout−.

[0044] The one resistive circuit mesh 25 comprises resistors R25 and R26connected between the differential pair transistors Q23 and Q24 and apower source voltage VCC and a resistor R27 connected between thecollector electrodes of the differential pair transistors Q23 and Q24.The other resistive circuit mesh 26 comprises resistors R28 and R29connected between the differential pair transistors Q25 and Q26 and thepower source voltage VCC and a resistor R30 connected between thecollector electrodes of the differential pair transistors Q25 and Q26.

[0045] In the variable gain circuit 11 as constructed above, theinternal control voltage Vc is supplied not only between the baseelectrodes of the differential pair transistors Q23 and Q24 but alsobetween the base electrodes of the differential pair transistor Q25 andQ26, wherein the internal control voltage Vc is generated in the controlvoltage supply circuit 13 based on the voltage control at the externalcontrol voltage generating source 12. And a gain varies based on achange of current allocation at the current dividing circuits 23 and 24in response to this internal control voltage Vc.

[0046] On the other hand, the control voltage supply circuit 13generates the internal control voltage Vc in response to the externalcontrol voltage VC, wherein the internal control voltage Vc compensatesan non-linearity of the gain control characteristic of the variable gaincircuit 11 in an non-linear range. To be more concrete, in both rangesthat are less than and greater than the linear range of the gain controlcharacteristic in the conventional variable gain circuit as shown in adotted line in FIG. 3B, the control voltage supply circuit 13 generatesthe internal control voltage Vc shown in FIG. 3A by a solid line havinga more change relative to the external control voltage VC than theconventional internal control voltage beyond the linear range.

[0047] In the following, a concrete construction of the control voltagesupply circuit 13 is described with reference to FIG. 1, wherein theexternal control voltage VC given by the external control voltagegenerating source 12 is supplied to a first and a second differentialcircuits 15 and 16 by way of a buffer circuit 14 and is further suppliedto a current-voltage converting circuit 18 by way of a buffer circuit17.

[0048] The first differential circuit 15 comprises pnp type differentialpair transistors Q11 and Q12 respectively having emitter electrodescommonly connected to each other and a current source I-11 connectedbetween the commonly connected emitter electrodes of the transistors Q11and Q12 and the power source voltage VCC. And in the first differentialcircuit 15, a base electrode of the transistor Q11 is supplied with areference voltage Vk1 which corresponds to a lower limit of the linearrange in the gain control characteristic of the conventional one asshown in FIGS. 3A and 3B and a base electrode of the transistor Q12 issupplied with the external control voltage VC by way of the buffercircuit 14.

[0049] In this the first differential circuit 15, a collector electrodeof the transistor Q11 is connected directly to the ground GND and acollector electrode of the transistor Q12 is also connected to theground GND by way of a diode-connected npn type transistor Q13 and aresistor R11. The transistor Q13 constitutes a current mirror circuittogether with an npn type transistor Q14, wherein a base electrode ofthe transistor Q13 is connected to a base electrode of the transistorQ14 and an emitter electrode of the transistor Q14 is connected to theground GND by way of a resistor R12.

[0050] The second differential circuit 16 comprises npn typedifferential pair transistors Q15 and Q16 respectively having emitterelectrodes commonly connected to each other and a current source I-12connected between the commonly connected emitter electrodes of thetransistors Q15 and Q16 and the ground GND. And in the seconddifferential circuit 16, a base electrode of the transistor Q15 issupplied with a reference voltage Vk2 which corresponds to an upperlimit of the linear range in the gain control characteristic of theconventional one as shown in FIGS. 3A and 3B and a base electrode of thetransistor Q16 is supplied with the external control voltage VC by wayof the buffer circuit 14.

[0051] In this the second differential circuit 16, a collector electrodeof the transistor Q15 is connected directly to the power source voltageVCC and a collector electrode of the transistor Q16 is also connected tothe power source voltage VCC by way of a diode-connected pnp typetransistor Q17 and a resistor R13. The transistor Q17 constitutes acurrent mirror circuit together with an pnp type transistor Q18, whereina base electrode of the transistor Q17 is connected to a base electrodeof the transistor Q18 and an emitter electrode of the transistor Q18 isconnected to the power source voltage VCC by way of a resistor R14.

[0052] On the other hand, the current-voltage converting circuit 18comprises an npn type transistor Q16 having an emitter electrodeconnected to an output (here-in-after referred to as a node A) of thebuffer circuit 17, a resistor 15 interposed between a collectorelectrode of the transistor Q16 and the power source voltage VCC, aseries-connected resistor R16 and direct-current power source 19 and acurrent source I-13 interposed between the node A and the ground GND.Further each collector electrode of the transistors Q14 and Q18 of thetwo current mirror circuits is connected to the node A.

[0053] A circuit operation of the control voltage supply circuit 13 isdescribed with reference to FIG. 3A and FIG. 3B. In the figures, FIG. 3Ashows a graph chart of the internal control voltage Vc as to theexternal control voltage VC and FIG. 3B shows a graph chart showing acharacteristic of a transmission gain G as to the external controlvoltage VC.

[0054] At first, when the external control voltage VC external controlvoltage generating source 12 is in the voltage range from the referencevoltage Vk1 of the first differential circuit 15 to the referencevoltage Vk2 of the second differential circuit 16, the currentproportional to the external control voltage VC flows through theresistor R16 by way of buffer circuits 14 and 17 in the current-voltageconverting circuit 18. Then a voltage at the collector electrode of thetransistor Q16 generated according to this current is supplied to avariable gain circuit 11 as an internal control voltage Vc.

[0055] In other words as shown in FIG. 3A by a solid line, the internalcontrol voltage Vc proportional to the external control voltage VC is tobe generated in the voltage range between Vk1 and Vk2 of the externalcontrol voltage VC. Accordingly, the gain of the variable gain circuit11 is changed linearly relative to the external control voltage VC bysupplying thus generated internal control voltage Vc to the variablegain circuit 11 as the control voltage as shown in FIG. 3B by a solidline.

[0056] As shown by a dotted line in FIG. 3A, the internal controlvoltage Vc of a conventional circuit which varies in linear relative tothe external control voltage VC in the voltage range less than thereference voltage Vk1 and more than the reference voltage Vk2 isobtained from the current-voltage converting circuit 18 and is suppliedto the variable gain circuit 11. Thereby the gain control characteristicof the variable gain circuit 11 is deteriorated the linearity as thegain control characteristic approaches and exceeds to the Gmax and theGmin as shown in FIG. 3B by a dotted line.

[0057] In the gain control circuit of this embodiment of the presentinvention, when the external control voltage VC becomes less than thereference voltage Vk1 of the first differential circuit 15, thetransistor Q12 becomes ON state, then current from the current sourceI-11 flows to the transistor Q13 by way of the transistor Q12. As thetransistor Q13 constitutes the current mirror circuit with thetransistor Q14, so that if each characteristic of the transistors Q13and Q14 is equal and if each resistive value of the resistors R11 andR12 is equal, then the current having the same value as the currentflowing through the transistor Q13 flows through the transistor Q14.

[0058] At this moment, the transistor Q18 is in off state and thecollector electrode of the transistor Q14 is connected to the node A,and accordingly the current flowing into the transistor Q14 is suppliedby the current-voltage converting circuit 18. Thereby in thecurrent-voltage converting circuit 18, a change of the collectorpotential of the transistor Q16 becomes large relative to the externalcontrol voltage VC because the current by the transistor Q14 flowsthrough the transistor Q16 in addition to the current from the currentsource I13 and the current flowing trough the resistor R16.

[0059] Therefore, in the voltage range where the external controlvoltage VC is less than the reference voltage Vk1, a reduction rate ofthe internal control voltage Vc becomes larger than the reduction rateof the internal control voltage Vc of the voltage range between Vk1 andVk2 as the external control voltage VC goes low. And by applying theinternal control voltage Vc having the large changing rate to thevariable gain circuit 11, the linearity of the gain controlcharacteristic can be extended to near the minimum transmission gainGmin as shown in FIG. 3B.

[0060] On the other hand, the transistor Q16 becomes ON state when theexternal control voltage VC exceeds the reference voltage Vk2 of thesecond differential circuit 16. Therefore current flows to the currentsource I12 through the transistors Q16 and Q17. As the transistor Q17composes the current mirror circuit with the transistor Q18, so that ifeach characteristic of the transistors Q17 and Q18 is equal and eachresistive value of the resistors R13 and R14 is equal, then currenthaving the same as current flowing in the transistor Q17 flows throughthe transistor Q18.

[0061] At this moment, the transistor Q14 is in off state and thecollector electrode of the transistor Q18 is connected to the node A,and accordingly the current flowing through the transistor Q18 issupplied to the current-voltage converting circuit 18. Thereby in thecurrent-voltage converting circuit 18, a change of the collectorpotential of the transistor Q16 becomes large relative to the externalcontrol voltage VC because the current by the transistor Q18 flowsthrough the transistor Q16.

[0062] Therefore, in the voltage range where the external controlvoltage VC is exceeds the reference voltage Vk2, a increasing rate ofthe internal control voltage Vc becomes larger than the increasing rateof the internal control voltage Vc of the voltage range between Vk1 andVk2 as the external control voltage VC goes low. And by applying theinternal control voltage Vc having the large changing rate to thevariable gain circuit 11, the linearity of the gain controlcharacteristic can be extended to near the maximum transmission gainGmax as shown in FIG. 3B.

[0063] As described above, the control voltage supply circuit 13generates a mid range part of the internal control voltage Vc varyinglinearly against the external control voltage VC to the voltage rangebetween Vk1 and Vk2, and a higher range part and a lower range part ofthe internal control voltage Vc varying in higher rate against theexternal control voltage VC to a voltage range outside of the voltagerange between Vk1 and Vk2. And thus generated internal control voltageVc is supplied to the variable gain circuit 11, and accordingly thelinearity can be compensated in the range where the linearity is lost inthe conventional circuit shown in the FIG. 3B by the dotted line.

[0064] As a result, a linearity for the gain control characteristic ofthe variable gain circuit 11 is improved against the external controlvoltage VC, so that an usable linear range of the variable gain circuit11 can be expanded as shown in FIG. 3B by the solid line.

[0065]FIG. 4 is a block diagram showing a construction of a gain controlcircuit related to a second embodiment of the present invention.

[0066] The gain control circuit related to the embodiment comprises aplurality of cascade-connected variable gain circuits 31, 32 and 33 eachhaving differential input and output, and a control voltage supplycircuit 35 to supply internal control voltages Vc1, Vc2 and Vc3 to thevariable gain circuits 31, 32 and 33 respectively, wherein theseinternal control voltages Vc1, Vc2 and Vc3 are generated based on agiven external control voltage VC from an external control voltagegenerating source 34.

[0067] Each of variable gain circuits 31, 32 and 33 has a limitedvariable gain range, and is connected mutually by way of buffer circuits36 and 37. These variable gain circuits 31, 32 and 33 have gain controlterminals VC 1, VC 2 and VC 3, respectively, and the internal controlvoltages Vc1, Vc2 and Vc3 set in the control voltage supply circuit 35are supplied to these gain control terminals VC 1, VC 2 and VC 3 as gaincontrol voltages as shown in FIG. 4.

[0068] In the gain control circuit of the second embodiment of theinvention, the variable gain circuit shown in FIG. 2 is used as each ofthe variable gain circuits 31, 32 and 33. Namely the gain controlcircuit having the wide gain control range is composed bycascade-connected these variable gain circuits 31, 32 and 33. In thisgain control circuit, the variable gain circuit 31 handles the lowerrange, the variable gain circuit 32 handles the mid-range and thevariable gain circuit 33 handles the upper range on the linearity curveshown in FIG. 3B.

[0069] In addition, the circuit structure of the control voltage supplycircuit 13 shown in FIG. 1 is used as the control voltage supply circuit35. In the characteristic of the external control voltage VC against theinternal control voltage Vc shown in FIG. 3A, the internal controlvoltages Vc1, Vc2 and Vc3 obtained from the control voltage supplycircuit 35 have offset value and supplied to each of the variable gaincircuits 31, 32 and 33.

[0070] As described above, the internal control voltages Vc1, Vc2 andVc3 obtained from the control voltage supply circuit 35 are supplied tothe variable gain circuits 31, 32 and 33 as the gain control voltagewhich compensates non-linearity of upper and lower ranges by thevariable gain circuits 31, 32 and 33.

[0071] As thus described, in the present invention, the variable gaincircuits 31, 32 and 33 are cascade-connected, the internal controlvoltage Vc1, Vc2 and Vc 3 are generated so as to compensate thenon-linearity of a gain control circuit having relatively wide gaincontrol range, and thus generated internal control voltage Vc1, Vc2 andVc 3 are supplied to each of the variable gain circuit 31, 32 and 33.Accordingly each of linearity characteristic of the variable gaincircuits 31, 32 and 33 is improved, and thereby total linearity of thegain control circuit is largely improved as shown in FIG. 3B by thesolid line.

[0072] On the contrary, when the linear range of the gain controlcharacteristic for the gain control circuit is not so wide as comparedwith the conventional linear range, only two variable gain circuits, forexample the variable gain circuits 32 and 33, are necessary to expandthe linear range of the gain control characteristic.

[0073] In this case, the power consumption for the AGC amplifier isreduced for the sake of this. Further if the gain control circuitcomprises two variable gain circuits, one of buffer circuits 36 and 37is also omitted and further saving of the power consumption and areduction of circuit volume are expected.

[0074] In addition, the gain control circuit in FIG. 4 comprisescascade-connected three variable gain circuits, however the number ofthe variable gain circuits is not limited to three, and it is possibleto use four or more of variable gain circuits in order to expand thelinearity range of the gain control circuit.

[0075] The gain control circuit of the above-described second embodimentis used, for example, as a gain control circuit of an RF front-end partin a CDMA type mobile telephone apparatus. FIG. 5 is a block diagramshowing one example of a construction of the RF front-end part in theCDMA type mobile telephone apparatus.

[0076] A radio wave received as a receiving RF signal by an radioantenna 41 is supplied to a mixer circuit 44 by way of a frequency bandseparation filter 42 commonly used in transmission and reception and alow noise amplifier 43. The receiving RF signal from the low noiseamplifier 43 is mixed with a local oscillation carrier from a localoscillator circuit 45 to generate a receiving IF (IntermediateFrequency) signal. Thus generated receiving IF signal is adjusted itssignal level at an AGC amplifier 46, and then supplied to a base-band IC47.

[0077] On the other hand, in transmitting, a transmitting IF signalgenerated in the base-band IC 47 is supplied to a mixer circuit 49 byway of an AGC amplifier 48, and the transmitting IF signal is convertedto a transmitting RF signal by mixing a local oscillation carrier from alocal oscillation circuit 50. This transmitting RF signal is transmittedfrom the antenna 41 by way of a power amplifier 51 and the frequencyband separation filter 42. The base-band IC 47 functions to demodulateand decode the receiving IF signal to be an output audio signal in thereceiving case, and encode and modulate an input audio signal to be thetransmitting IF signal in the transmitting case.

[0078] In the RF front-end part of the CDMA type mobile telephoneapparatus of the construction, the gain control circuit having aplurality of stages in the second embodiment as mentioned above can beapplied to the AGC amplifier 48, wherein the AGC amplifier 48 issupplied with the transmitting IF signal to be supplied to the mixercircuit 49 and must have a wide gain control range.

[0079] As thus described in the transmission stage of the CDMA typemobile telephone apparatus, a wide gain control characteristic having anextended linear range can be obtained by using the gain control circuitof the second embodiment as the AGC amplifier 48. Accordingly only thereduced number of variable gain circuits are necessary in thetransmission stage of the CDMA type mobile telephone apparatus and apower consumption of the mobile terminal can be achieved by applying thepresent invention.

[0080] In addition, the CDMA type mobile telephone apparatus isexplained for an example. However, the present invention is not limitedto this application example but can be applied to various types of radiocommunication apparatuses.

What is claimed is:
 1. A gain control circuit comprising: a variablegain circuit having a predetermined gain control range; and a controlvoltage supply circuit for supplying an internal control voltage to saidvariable gain circuit as a gain control signal, wherein said controlvoltage supply circuit generates said internal control voltage inresponse to an external control voltage as to compensate a linearity ofsaid variable gain circuit to an extent of the external control voltagewhere said variable gain circuit loses a linearity.
 2. The gain controlcircuit as claimed in claim 1 , wherein said control voltage supplycircuit generates said internal control voltage varying in linear asagainst said external control voltage in voltage ranges from a firstreference voltage to a second reference voltage, and a changing ratio ofsaid internal control voltage is set to be larger than a changing ratioof at least in the voltage range that is less than the first referencevoltage and the voltage range that is greater than the second referencevoltage.
 3. The gain control circuit as claimed in claim 1 , whereinmore than one of said variable gain circuits are connected in cascadeconnection.
 4. A radio communication apparatus having an amplificationmeans in a transmitting stage for amplifying an intermediate frequencysignal and supplying said intermediate frequency signal to a mixingcircuit, in which said amplification means comprising: a variable gaincircuit having a predetermined gain control range; and a control voltagesupply circuit for supplying an internal control voltage to saidvariable gain circuit as a gain control signal, wherein said controlvoltage supply circuit generates said internal control voltage inresponse to an external control voltage as to compensate a linearity ofsaid variable gain circuit to an extent of the external control voltagewhere said variable gain circuit loses a linearity.
 5. The radiocommunication apparatus as claimed in claim 4 , wherein the controlvoltage supply circuit generates the internal control voltage varying inlinear as against the external control voltage in voltage ranges from afirst reference voltage to the second reference voltage, and a changingratio of said internal control voltage is set to be larger than achanging ratio of at least in the voltage range that is less than thefirst reference voltage and the voltage range that is greater than thesecond reference voltage.
 6. The radio communication apparatus asclaimed in claim 4 , wherein more than one of said variable gaincircuits are connected in cascade connection.